L 3 C 3
Teachers Continuous Evaluation: 40 marks. Term-End Semester Examination: 60 marks.
Course outcomes
- Ability to understand codes and minimize Boolean expression
- Design and Implement Combinational and Sequential Circuits
- Ability to Design Finite state machines of the Moore and Mealy types
- Understand functioning of a digital computer
Unit I
Number systems: binary, octal, decimal, hexadecimal, base conversions, complements (1’s, 2’s, 9’s, 10’s), binary arithmetic, signed number representations (sign-magnitude, 1’s and 2’s complement), overflow conditions.Binary codes: BCD, Gray code, ASCII, parity bits. Boolean algebra: logic gates and their realization, truth tables, canonical forms, minterms and maxterms. Logic simplification using Boolean algebra and Karnaugh maps (up to 5 variables), don’t care conditions, NAND-NAND and NOR-NOR networks.
Unit II
Design and implementation of: adders (half, full, carry lookahead), subtractors, comparators, encoders, decoders, priority encoders, multiplexers, demultiplexers.Function realization using MUX, DEMUX, and ROM.Design of arithmetic circuits: 4-bit adders/subtractors, BCD adders. Magnitude comparator, code converters ,parity generator/checker. Use of standard ICs and programmable logic devices (PLA, PAL — basic introduction).Binary multipliers: combinational array multiplier.
Unit III
Bistable elements: latches (SR, D), flip-flops (SR, D, JK, T — level and edge-triggered), characteristic equations, excitation tables, timing diagrams.Flip-flop timing: setup, hold, propagation delay. Counters: asynchronous, synchronous, up-down, modulus-n, Johnson, ring counters.Shift registers and bidirectional shift registers.Sequential design methodology using state diagrams, Moore and Mealy machines, state reduction.Design of synchronous sequential circuits , up/down and modulus counters , shift registers, Ring counter , Johnson counter , timing diagram , serial adder, sequence detector,Design of sequence detectors, control logic with FSMs. Classification of memories: ROM, RAM, static and dynamic RAM, memory cell design concepts, memory timing, address decoding logic.
Unit IV
Functional components of a digital computer: control unit, ALU, registers, memory, and interconnect.Instruction cycle: fetch, decode, execute.Register transfer language (RTL), micro-operations, and control signals.Control unit design: hardwired control logic (detailed), microprogramming (basic concepts only).Introduction to bus structures, memory read/write sequences.Addressing modes: immediate, direct, indirect, register, indexed.I/O mechanisms: program- controlled, interrupt-driven, DMA overview. Basic instruction format and design. Conceptual design of a simple accumulator- based computer.
Textbooks
- Digital Logic and Computer Design, M. Morris Mano, Pearson Education, Latest Edition.
References
- Digital Design and Computer Architecture, David Harris & Sarah Harris, Morgan Kaufmann, 4 Edition.
- Computer System Architecture, M. Morris Mano, Rajib Mall Pearson Education, 2017 th
- Computer Organization and Embedded Systems, Carl Hamacher, Z. Vranesic, S. Zaky, McGraw-Hill, 6 Edition. rd
- Fundamentals of Digital Logic with Verilog Design, Stephen Brown and Zvonko Vranesic, McGraw-Hill, 3 Edition. rd
- Digital Systems: Principles and Applications, Ronald J. Tocci, Neal S. Widmer, Pearson, 3 Edition. th
- Computer System Architecture, M. Morris Mano, Pearson Education, 12 Edition. th
- Fundamentals of Logic Design, Charles H. Roth, Jr., Larry L. Kinney, Cengage, 7 Edition. th
- Computer Organization and Embedded Systems, Hamacher, Vranesic, Zaky, McGraw Hill, 6 Edition. th
- Computer Architecture: A Quantitative Approach, John L. Hennessy and David A. Patterson, Morgan Kaufmann, 7 Edition.